ASSET InterTech - Strategic accord with SiliconAid extends ASSET’s ScanWorks belvedere into cavity analysis and verification

Strategic accord with SiliconAid extends ASSET’s ScanWorks belvedere into cavity analysis and verification

Chip debugger will be chip into ScanWorks®; ASSET to resell IEEE P1687 admittance and analysis tools

Richardson, TX (November 3, 2009) – ASSET® InterTech (www.asset-intertech.com), the arch supplier of accessible accoutrement for anchored instrumentation, and SiliconAid Solutions (www.siliconaid.com), Austin, TX., accept formed a cardinal accord whereby ASSET will accommodate its aboriginal chip ambit (IC) analysis apparatus into the ScanWorks® belvedere for anchored chart and resell SiliconAid’s admittance and analysis accoutrement that abutment the arising IEEE P1687 Internal JTAG (IJTAG) standard. SiliconAid is a supplier of apple chic cavity analysis and alter accoutrement that abutment the IEEE 1149.1 Boundary-Scan Standard, which is frequently referred to as JTAG afterwards the Joint Test Action Group which accomplished development of the standard.

“This is just the aboriginal footfall against our eyes of a connected analysis breeze alpha at the cavity akin and extending to ambit boards and systems,” said Glenn Woppman, admiral and CEO of ASSET. “Beyond this cavity debugger that we’ll be amalgam into the ScanWorks platform, we can see a time if all-encompassing cavity tests can be re-used in axle and arrangement test, extenuative manufacturers appreciably on analysis development and abridgement time-to-market. We’re aswell aflame about announcement SiliconAid’s IEEE P1687 IJTAG tools. We ambition to animate the acceptance of this arising accepted because we accept it will be analytical to the able appliance of anchored chart in approaching analysis and altitude applications.”

SiliconAid’s JTDTM cavity debugger, which will be chip into ScanWorks immediately, is a able-bodied real-time analysis and alter apparatus that can adviser structures central chips and accord afterimage through an automatic graphical interface to the architect who is debugging the device. Although ASSET will initially resell SiliconAid’s IEEE P1687 IJTAG amalgam (JTSTM) and analysis (JTVTM) tools, approaching affairs could alarm for these accoutrement to be chip into ScanWorks as well. JTSTM and JTVTM acquiesce cavity designers to automatically admit IJTAG capabilities into chips and after verify the implementation. IEEE P1687 provides a accepted interface to chart anchored in chips.

“We are aflame about teaming up with ASSET to resell our accoutrement and to advice advance the industry’s acceptance of the IJTAG IEEE P1687 standard,” said Jim Johnson, admiral of SiliconAid. “This accepted is not just important for our two companies. It will be analytical to the industry as anchored chart proliferates in next-generation devices. Standards like P1687 accredit a college akin of affiliation and automation, alpha with cavity architecture and test, and again transitioning seamlessly into axle test. Adding IEEE P1687 IJTAG accoutrement into our apartment is a accustomed next footfall for us to advantage our absolute articles and action added amount to our customers.”
As allotment of the new relationship, the two companies agreed to do collective marketing. The aboriginal such action will be the 2009 International Test Conference (ITC), Nov. 2-6 in the Austin Convention Center, Austin, TX. Both companies will accept booths at this year’s ITC and ASSET’s berth (No. 117) will affection a affirmation of SiliconAid’s JTDTM debugger. In addition, ASSET will affection the JTDTM debugger at Productronica in Munich, Germany, Nov. 10-13 (Hall A1, Stand 470).

ScanWorks® – The Embedded Instrumentation Platform
ASSET, through its ScanWorks platform, is applying the acquaintance it has acquired from two decades as a arch supplier of IEEE 1149.1 boundary-scan (JTAG) analysis accoutrement to the development of accessible anchored chart tools. The boundary-scan basement that is anchored into chips and ambit boards is one of several technologies which can anatomy the base for an anchored chart toolset. In contempo years, ASSET has decidedly added ScanWorks above boundary-scan analysis with the accession of added anchored chart technologies, including processor-controlled analysis (PCT) and accoutrement for Intel® IBIST (Interconnect Built-In Self Test), an anchored chart technology that Intel® and added companies are embedding into next-generation chips and chipsets.

SiliconAid’s SAJESM Tool Suite
The SiliconAid JTAG Environment (SAJESM) is comprised of accoutrement (JTVTM, JTSTM, JTDTM) that focus on cavity akin JTAG needs for 1149.1, 1149.6, and now IEEE P1687. SAJESM can be chip into any above cavity architecture action to handle JTAG requirements. The SAJESM apartment performs semantic checking, simulation-based verification, automated analysis affairs bearing (ATPG) and alternate debugging. Now the SAJESM apartment offers these functions in abutment of the IEEE P1687 standard. SAJESM can advantage architecture simulation advice into automated analysis accessories (ATE) and axle analysis with analysis patterns and an alternate debugger (JTDTM).

About ASSET InterTech
ASSET InterTech is the arch supplier of accessible accoutrement for anchored chart for architecture validation, analysis and debug. The ScanWorks belvedere provides automation, acceptance and appraisal accoutrement in one environment. Users can bound and calmly validate and analysis semiconductors, ambit boards or absolute systems during every appearance of a product's life, including design, manufacturing/repair and acreage maintenance. ASSET InterTech is amid at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

About SiliconAid Solutions, Inc. (www.siliconaid.com)
SiliconAid Solutions, Inc. was founded in 2001 and is headquartered in Austin, Texas. SiliconAid has a JTAG software development accumulation and a apple chic design-for-test (DFT) consulting accumulation acknowledging all cyberbanking architecture automation (EDA) DFT tools. SiliconAid has developed a abounding apartment of accoutrement for JTAG creation, analysis and debug. SiliconAid Solutions, Inc. is a abreast captivated Texas association amid at 9901 Brodie Lane, Suite 160217, Austin TX 78748.

Trademarks:
ASSET, the ASSET logo and ScanWorks are registered trademarks of ASSET InterTech, Inc. All added barter and account marks are the backdrop of their corresponding owners.

For added information, amuse contact:
Sandra Iris Eilenstein
ITPR Information-Travels Public Relations
Stefanusstraße 6a
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For clairvoyant inquiries, amuse broadcast this contact:
Reg WallerASSET InterTech Inc.
6 Garden Court Business Center
AL7 1BH Welwyn Garden City, Herts
T. +44 1707 396 05 6
rwaller@asset-intertech.com
www.asset-intertech.com